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Industry brief · Power & digital
Semiconductor manufacturingfront-end fabs, OSAT/ATMP, display & compound semis
Wafer fabrication (leading-edge logic, memory/HBM, mature-node and specialty/compound semiconductors) and back-end assembly, test, marking and packaging (OSAT/ATMP, advanced packaging such as CoWoS/HBM stacking). Industrial policy (US CHIPS Act, EU Chips Act, India Semiconductor Mission and Semicon 2.0) underwrites a global fab build-out, but megaproject risk is extreme: USD 10-40bn per fab, 3-5 years to volume, scarce cleanroom/MEP labour, tool lead times, utilities (power, ultrapure water, gases) and customer/yield ramp risk.
Pack v1.0.0 · updated 5 Oct 2026 · 13 cited sources · 14 parameters · 10 swing factors.
At a glance
Pack defaults with their low–high range. Overruns are sector means as a share of the original budget or schedule. All parameters and sources
Sub-industries
Capex intensity ranges by configuration. The unit changes with the asset, so compare within a row, not across rows.
| Sub-industry | Capex intensity | Notes |
|---|---|---|
| Leading-edge logic foundry fabs (N3/N2/18A and below)TSMC Arizona (USD 165bn, 6 fabs planned), Intel 18A/14A (Arizona, Ohio), Samsung Taylor, Rapidus Hokkaido. | 250,000–600,000USD per wafer start per month (WSPM) | estimate: ~USD 20-30bn for ~40-60k WSPM at N3/N2; US construction costs higher than Taiwan; EUV ~USD 200-400m per tool. |
| DRAM/HBM and NAND fabsMicron Idaho/New York (USD 200bn US commitment), SK hynix Yongin/Indiana HBM packaging, Samsung Pyeongtaek. | 150,000–400,000USD per WSPM | estimate; HBM requires additional TSV/stacking back-end capex. |
| Mature-node and specialty fabs (28-180 nm, power, analog, SiC/GaN)Tata Electronics-PSMC Dholera (50k WSPM, Rs 91,000 crore), ESMC Dresden (TSMC-Bosch-Infineon-NXP), GlobalFoundries, TI Sherman/Lehi, Infineon Dresden, SiCSem Odisha. | 120,000–250,000USD per WSPM | Tata Dholera: Rs 91,000 crore / 50k WSPM ~ Rs 1.8 crore per WSPM (~USD 190k at INR 95.8). ESMC ~EUR 10bn for ~40k WSPM (~USD 280k) - estimate. |
| OSAT / ATMP and advanced packagingMicron Sanand ATMP (USD 2.75bn), Tata TSAT Assam (Rs 27,000 crore), CG Semi Sanand, Kaynes Sanand, HCL-Foxconn Jewar; TSMC CoWoS, Amkor Arizona, ASE. | 300–7,000USD million per plant | India OSAT Rs 3,300-27,000 crore (~USD 0.35-2.9bn); advanced packaging (CoWoS/SoIC) plants USD 2-7bn - estimate. |
| Display fabs, equipment-component and materials plantsDisplay fabs, chip-equipment parts (Lam Research India Rs 10,000 crore unit), gases/chemicals and substrates. | 100–8,000USD million per plant | estimate. |
Value chain
Inputs
- EDA/IP and design
- silicon wafers (300 mm), SiC substrates
- photomasks and photoresists
- specialty and bulk gases (N2, Ar, He, NF3, WF6)
- wet chemicals and CMP slurries
- wafer-fab equipment (litho, etch, dep, metrology)
- ultrapure water and stable 24x7 power
- cleanroom construction and MEP
- substrates, leadframes, bonding wire, mould compounds (back-end)
Process
- front-end: lithography, etch, deposition, implant, CMP, metrology (500-1,000+ steps)
- wafer sort/probe
- back-end: dicing, die attach, wire-bond/flip-chip, moulding
- advanced packaging (2.5D/3D, HBM stacking, chiplets)
- final test and burn-in
- yield ramp and customer qualification
Outputs
- logic (CPU/GPU/ASIC/SoC)
- memory (DRAM/HBM/NAND)
- analog/power/discretes (incl. SiC/GaN)
- MCUs and automotive chips
- packaged and tested ICs
Parameters
14 parameters: 4 sourced, 10 informed estimates. The bar shows the low–high range with the default marked; estimates are labelled and never presented as observed data.
| Parameter | Default & range | Evidence | Source |
|---|---|---|---|
| Capex intensity(mature/specialty blended); leading-edge 250-600k | 220,000 USD per WSPMrange 120,000–600,000 | estimateas of 5 Oct 2026 | Tata Dholera Rs 91,000 crore / 50k WSPM; TSMC Arizona |
| Construction months(groundbreak to volume production) | 42 monthsrange 24–72 | sourcedas of 5 Oct 2026 | en.wikipedia.org |
| Cost overrun mean | 25%range 0%–100% | estimateas of 5 Oct 2026 | US/EU greenfield fabs; TSMC Arizona initial USD 12bn plan became USD 40bn for phase 1-2 scope |
| Schedule overrun mean | 40%range 0%–150% | estimateas of 5 Oct 2026 | TSMC Arizona fab 2 and Intel Ohio delayed to ~2030-31; Intel Magdeburg cancelled 2025 |
| Asset life (years)(buildings 30+, tools 5-7) | 15 yearsrange 5–30 | estimateas of 5 Oct 2026 | Informed estimate; no single source |
| WACC | 9%range 7%–13% | estimateas of 5 Oct 2026 | Informed estimate; no single source |
| Typical IRR(project, post-subsidy) | 14%range 5%–25% | estimateas of 5 Oct 2026 | Informed estimate; no single source |
| Utilization | 80%range 60%–98% | estimateas of 5 Oct 2026 | Informed estimate; no single source |
| Opex % of revenue(cash cost ex-D&A) | 50%range 35%–70% | estimateas of 5 Oct 2026 | Informed estimate; no single source |
| EBITDA margin(foundry/memory peak 60-70%; OSAT 15-25%) | 45%range 15%–70% | estimateas of 5 Oct 2026 | Informed estimate; no single source |
| ISM outlay (INR crore)(ISM 1.0); Semicon 2.0 Rs 1,27,500 crore | 76,000 Rs crorerange 76,000–127,500 | sourcedas of 5 Oct 2026 | en.wikipedia.org |
| CHIPS act manufacturing incentives (USD bn)(plus 25% ITC) | 39 USD bn grantsrange 39–52.7 | sourcedas of 5 Oct 2026 | en.wikipedia.org |
| EU CHIPS act (EUR bn) | 43 EUR bn policy-driven investmentrange 43–86 | sourcedas of 5 Oct 2026 | en.wikipedia.org |
| Fab power MW | 150 MW per large fabrange 50–300 | estimateas of 5 Oct 2026 | Informed estimate; no single source |
What moves value
Sorted by expected cost (probability × cost impact). Impacts are typical values for the sector; each one is driven by the shared factors listed, which is how one shock reaches several projects at once.
Market signals
What moves the case
Key variables with their typical range and what they hit in the model.
| Variable | Typical range | Affects |
|---|---|---|
| Wafer-fab equipment marketWFE ~70-80% of fab capex; tool lead times 6-18 months (EUV longer) - estimate. | 80–150USD bn/yr | Capex, Schedule |
| Semiconductor machinery PPI+22% since Jan-2020 (Aug-2026). | 85–115index | Capex |
| Semiconductor device PPIQuality-adjusted index falls over time; memory pricing (HBM/DRAM) far more volatile. | 25–35index | Revenue |
| Fab utilisationHigh fixed cost: each 10 pt utilisation ~ 5-8 pt gross-margin swing for foundries. | 60%–98% | Revenue, Margin |
| Line/die yield at rampNew-node/new-site yield learning drives 6-18 month ramp risk. | 30%–95% | Revenue, Schedule |
| Industrial electricity price PPIAdvanced fab ~100-200 MW load; power ~5-10% of wafer cost. | 250–400index | Opex |
| Industrial gas PPIHelium/neon supply shocks (Ukraine, Qatar) are a key risk. | 200–320index | Opex |
| Construction materials PPICleanroom shell/MEP ~20-30% of fab capex; US costs 4-5x Taiwan per sq ft - estimate. | 230–400index | Capex |
Show 4 more variables
| Variable | Typical range | Affects |
|---|---|---|
| US construction hourly earningsFab sites need 5,000-12,000 craft workers at peak; competing with data-centre megaprojects. | 35–50USD/h | Capex, Schedule |
| Government incentive share of capexIndia ISM: 50% central fiscal support pari-passu + 20-25% state; US CHIPS grants ~10-15% + 25-35% ITC; EU state aid 20-40%. | 10%–70% | Financing, Capex |
| US 10-year TreasuryFab carrying cost during 3-5 yr pre-revenue period. | 3–6percent | Financing |
| INR per USDTools priced in USD/JPY/EUR; INR fall from ~83 to ~96 raised Indian fab budgets ~15% in INR. | 80–100INR/USD | Capex |
Price feeds (13)
| Series | Source / id | Unit | Frequency |
|---|---|---|---|
| PPI: Semiconductor and related device manufacturing | PCU334413334413FRED | index | monthly |
| PPI: Semiconductor and other electronic components | PCU3344133441FRED | index | monthly |
| PPI: Semiconductor machinery manufacturing | PCU333242333242FRED | index | monthly |
| PPI: Industrial gas manufacturing | PCU325120325120FRED | index | monthly |
| PPI: Printed circuit assembly | PCU334418334418FRED | index | monthly |
| PPI: Industrial electric power | WPU0543FRED | index | monthly |
| PPI: Construction materials | WPUSI012011FRED | index | monthly |
| Average hourly earnings, construction | CES2000000003FRED | USD/h | monthly |
Show 5 more feeds
| Series | Source / id | Unit | Frequency |
|---|---|---|---|
| Global price of Copper | PCOPPUSDMFRED | USD/t | monthly |
| US 10-year Treasury yield | DGS10FRED | percent | daily |
| INR per USD | DEXINUSFRED | INR/USD | daily |
| PHLX Semiconductor Index | ^SOXYahoo | index | daily |
| VanEck Semiconductor ETF | SMHYahoo | USD | daily |
Listed tickers (24)
Market context only: these prices tend to react first when a driver moves. Named for context; no affiliation.
Operators · 14
- CGPOWER.NS CG Power (CG Semi OSAT) NSE · IN
- KAYNES.NS Kaynes Technology (Kaynes Semicon OSAT) NSE · IN
- HCLTECH.NS HCL Technologies (HCL-Foxconn OSAT JV) NSE · IN
- TSM TSMC NYSE · APAC
- INTC Intel NASDAQ · US
- MU Micron Technology NASDAQ · US
- GFS GlobalFoundries NASDAQ · US
- TXN Texas Instruments NASDAQ · US
- ASX ASE Technology (OSAT) NYSE · APAC
- IFX.DE Infineon Technologies XETRA · EU
- STMPA.PA STMicroelectronics Euronext Paris · EU
- NXPI NXP Semiconductors NASDAQ · EU
- 005930.KS Samsung Electronics KRX · APAC
- 000660.KS SK hynix KRX · APAC
Suppliers · 7
- MOSCHIP.NS MosChip Technologies (design) NSE · IN
- LT.NS Larsen & Toubro (fab EPC, L&T Semiconductor) NSE · IN
- AMAT Applied Materials NASDAQ · US
- LRCX Lam Research NASDAQ · US
- KLAC KLA NASDAQ · US
- ASML.AS ASML Euronext Amsterdam · EU
- 8035.T Tokyo Electron TSE · APAC
Consumers · 2
- DIXON.NS Dixon Technologies (electronics EMS, display JV) NSE · IN
- NVDA NVIDIA (demand anchor) NASDAQ · US
Proxys · 1
- SMH VanEck Semiconductor ETF NASDAQ · US
Trends and research findings
Trends
- India moves from approvals to production2025-2030
ISM approved 12 units (~Rs 1.64 lakh crore) against a Rs 76,000 crore outlay; Micron, Kaynes and CG Semi are in commercial production; Semicon 2.0 approved Jul-2026 with Rs 1,27,500 crore.
- TSMC Arizona scale-up2025-2030
Pledged investment rose to USD 165bn (six fabs); Phase 1 began 4 nm production in early 2025 at 10k WSPM scaling to 30k; CHIPS grants USD 6.6bn.
- US CHIPS shifts toward equity and tariffs2025-2030
USD 52.7bn appropriated (USD 39bn manufacturing incentives + 25% ITC); 2025 policy converted part of Intel's grants into a ~10% government equity stake and leaned on Section 232 tariffs.
- EU Chips Act under-delivers2025-2030
EUR 43bn public investment target with only ~EUR 4.5bn under direct Commission control; ECA says 20% share by 2030 is very unlikely; Intel Magdeburg cancelled; Chips Act 2.0 under discussion.
- AI-led memory and packaging super-cycle2025-2028
HBM and advanced packaging (CoWoS) drive capex: Micron capex nearly doubled to USD 15.9bn in FY2025; NVIDIA revenue USD 215.9bn FY2026.
- Equipment localisation in India2026-2030
Lam Research committed Rs 10,000 crore for India's first semiconductor component manufacturing unit.
Research findings
- TSMC Arizona cost escalation
Initial plan: USD 12bn over 8 years for 20k WSPM (2020); construction cost later estimated at USD 40bn and total pledge USD 165bn.
- Intel capex retrenchment (SEC)
Intel purchases of PP&E fell from USD 25.8bn (2023) and USD 23.9bn (2024) to USD 14.6bn (2025).
- Micron capex (SEC)
Micron capex USD 15.9bn in FY2025 vs USD 8.4bn in FY2024.
- EU Chips Act audit
Act mobilises at least EUR 86bn (EUR 43bn public + matched private) but the Commission controls ~EUR 4.5bn; remaining ~EUR 35bn depends on national state aid.
- CHIPS project pipeline
By Mar-2024 the act had incentivised 25-50 projects worth USD 160-200bn and 25,000-45,000 jobs, but faced grant delays and skilled-worker shortages.
- Critical-mineral exposure
China supplies ~99% of refined gallium; data-centre demand for gallium could exceed 10% of today's supply by 2030.
KPIs, regions and who builds
KPIs the pack tracks
Regional notes
| India | ISM 1.0 (Rs 76,000 crore) approved 12 units (~Rs 1.64 lakh crore) incl. Tata-PSMC Dholera fab, Micron/CG/Kaynes/Tata/HCL-Foxconn OSATs, SiC and glass-substrate units; Semicon 2.0 (Rs 1,27,500 crore, Jul-2026) extends to equipment, materials and display. Constraints: utilities at Dholera/Sanand, skilled fab workforce, technology partners, INR depreciation; strengths: 50% central + state subsidies, design talent, electronics demand (Rs 6.27 lakh crore mobile output). |
|---|---|
| United States | CHIPS Act grants + 25% ITC (raised to 35% for projects starting by end-2026 under OBBBA) underpin TSMC, Samsung, Micron, Intel, TI, GF projects; administration pivot to equity stakes and tariffs; labour and construction cost premiums; Intel Ohio pushed to ~2030-31. |
| Europe | Chips Act (EUR 43bn) anchored ESMC Dresden, Infineon Dresden, ST/onsemi SiC; Intel Magdeburg/Poland cancelled; ECA and Bruegel (2026) find under-delivery; Chips Act 2.0 aimed at design, equipment and pilot lines. |
| Middle East | Saudi Arabia and UAE explore back-end/packaging and AI chip deployment under US export arrangements. |
Who builds and operates
Named for context; no affiliation. These are public market participants drawn from the research behind the pack. They are not Capibud clients or partners.
Operators · 12
- Tata Electronics India's first commercial fab at Dholera with PSMC (Rs 91,000 crore, 50k WSPM, 28-110 nm) and TSAT OSAT at Jagiroad, Assam (Rs 27,000 crore).
- Micron Technology Sanand ATMP (USD 2.75bn total with incentives) in commercial production; USD 200bn US commitment (Idaho, New York); capex USD 15.9bn FY2025.
- CG Semi (CG Power-Renesas-Stars) OSAT (~Rs 7,600 crore); among first three ISM units in commercial production.
- Kaynes Semicon OSAT (~Rs 3,300 crore) in commercial production.
- HCL-Foxconn / SiCSem / 3D Glass Solutions / CDIL / ASIP 2025 ISM approvals: Jewar display-driver OSAT, Odisha SiC fab and glass substrate packaging, Punjab discretes, Andhra OSAT.
- TSMC Arizona commitment USD 165bn (6 fabs + packaging); Kumamoto (JASM) and ESMC Dresden; CHIPS grant USD 6.6bn + USD 5bn loans.
- Intel 18A ramp in Arizona; Ohio fab delayed to ~2030-31; Magdeburg and Poland projects cancelled (2025); US government ~10% equity stake (2025); capex fell to USD 14.6bn in 2025 from USD 23.9bn.
- Samsung Electronics Taylor, TX fab (2 nm) anchored by Tesla AI chip contract; Pyeongtaek memory.
- SK hynix HBM leader; Yongin cluster and Indiana advanced packaging plant.
- GlobalFoundries / Texas Instruments Mature/specialty US capacity; TI capex ~USD 4.5bn in 2025 for Sherman/Lehi 300 mm fabs.
- ESMC (TSMC-Bosch-Infineon-NXP) / Infineon / STMicro EU Chips Act anchor projects; ST/Infineon SiC fabs (Catania, Kulim).
- Rapidus 2 nm pilot line in Hokkaido with heavy Japanese state funding.
Suppliers · 11
- ASML Sole EUV supplier; High-NA EUV ~EUR 350m+ per tool.
- Applied Materials / Lam Research / KLA Deposition, etch, process control; Lam investing Rs 10,000 crore in India components.
- Tokyo Electron / Screen / Advantest Coater/developer, cleaning, test.
- Linde / Air Liquide / Air Products / INOX Air Products On-site gas plants and bulk/specialty gases.
- Shin-Etsu / SUMCO / GlobalWafers / Siltronic 300 mm silicon wafers.
- Entegris / JSR / TOK / Merck KGaA Photoresists, filters, specialty chemicals.
- Exyte / Jacobs / Fluor / L&T / Tata Projects / Kajima Cleanroom design-build and MEP; L&T and Tata Projects build Indian fabs/OSATs.
- Synopsys / Cadence / Arm EDA and IP.
- Amkor / ASE / JCET OSAT incl. Amkor Arizona advanced packaging.
- Ebara / Kokusai / ASM International CMP, batch furnaces, ALD/epitaxy.
- Veolia / Evoqua / Kurita Ultrapure water and wastewater systems.
Customers · 5
- AI accelerators and hyperscalers (NVIDIA, AMD, Broadcom ASICs, Google TPU) Drive CoWoS and HBM capacity additions; NVIDIA FY2026 revenue USD 215.9bn.
- Smartphones and PCs (Apple, Samsung, Xiaomi, Dixon/Foxconn India) India mobile output Rs 6.27 lakh crore in 2025-26.
- Automotive and EV (Tata Motors, M&M, Tesla, VW, Bosch) MCUs, power (SiC/IGBT) and sensors; mature-node demand.
- Industrial, power and energy (inverters, grid, BESS) Power semis for renewables, data-centre power.
- Defence, telecom and space Trusted-foundry and domestic sourcing mandates.
Project template
Work breakdown
Share of total duration per step; steps overlap where predecessors allow, as the bars show. O / ML / P are optimistic, most-likely and pessimistic multipliers on each step's duration; the hatched tail is the pessimistic case.
| ID | Step & timing | Share | O / ML / P |
|---|---|---|---|
| A100 | Technology partner, product/customer commitments and business caseDevelop · factors: Data-centre demand, Policy | 12% | 0.9 / 1 / 1.6 |
| A110 | Incentive approval (ISM/CHIPS/state aid) and financingDevelop · factors: Policy, Interest rates | 15% | 0.85 / 1 / 1.8 |
| A120 | Site, environmental clearance, water and power allocationDevelop · factors: Policy, Grid queue, Power price | 15% | 0.9 / 1 / 1.6 |
| B100 | Fab/OSAT basic and detailed design (cleanroom, sub-fab, CUB)Engineer · EPC · factors: Labour | 15% | 0.9 / 1 / 1.4 |
| C100 | Process tool orders (litho, etch, dep, metrology / back-end tools)Procure · OEM · factors: Electrical equipment, Policy | 35% | 0.9 / 1 / 1.5 |
| C110 | Facility long-lead: chillers, AHUs/FFUs, UPW, gas plants, substationsProcure · OEM · factors: Electrical equipment, Steel, Copper | 30% | 0.9 / 1 / 1.5 |
| D100 | Piling, foundations and structural shell (vibration-isolated)Construct · EPC · factors: Construction materials, Steel, Labour | 25% | 0.9 / 1 / 1.4 |
| D110 | Cleanroom, MEP, process piping and hook-up infrastructureConstruct · EPC · factors: Labour, Copper, Steel | 35% | 0.9 / 1 / 1.6 |
| D120 | Utilities: dedicated substation, UPW and wastewater, bulk gasConstruct · EPC · factors: Grid queue, Electrical equipment, Labour | 30% | 0.9 / 1 / 1.6 |
| D130 | Tool move-in, installation and hook-upConstruct · OEM · factors: Labour, Electrical equipment | 20% | 0.9 / 1 / 1.5 |
| E100 | Tool qualification, pilot lots and yield learningCommission · OEM · factors: Labour, Electrical equipment | 15% | 0.9 / 1 / 1.8 |
| E110 | Customer qualification and volume rampCommission · factors: Data-centre demand, Labour | 15% | 0.9 / 1 / 2 |
Cost breakdown
Share of capex by line, with the commodity exposure of each line (the share of that line that moves with the commodity).
Financial template
Revenue model
Foundry: per-wafer pricing by node under long-term agreements; IDMs/memory: product sales exposed to price cycles; OSAT: per-unit assembly/test fees; returns heavily shaped by capital subsidies (ISM 50% pari-passu + state top-ups, CHIPS grants/ITC, EU state aid).
Margin driver
Fab utilisation
Ramp-up
3 years to steady state
How Capibud uses this pack
A pack is a starting position, not a forecast. When a semiconductor manufacturing decision opens in Capibud, pack v1.0.0 is copied in and pinned to that decision. The 14 parameters, 10 swing factors and templates the committee saw stay attached to the decision record, even after the pack is next refreshed.
Parameter ranges and WBS durations seed the P50, P80 and P90 for capex, schedule and value. Your own estimates, vendor quotes and actuals replace pack defaults line by line, and the record shows which numbers are still defaults.
Each swing factor is wired to shared factors; here the heaviest are policy, labour, electrical equipment and data-centre demand. A move in one factor hits every exposed project in the same scenario, which is how the capital committee sees concentration across a book rather than project by project.
The 13 price feeds and 24 listed tickers feed the brain, which watches for drivers moving outside their pack range and drafts the change for a person to review.
Shared factors behind this pack's swing factors
- Policy
- Labour
- Electrical equipment
- Data-centre demand
- Interest rates
- Power price
- Grid queue
Capex tied to a shared factor
- Electrical equipment49%
- Policy19.6%
- Labour12.1%
- Construction materials7.2%
- Steel4.8%
- Copper2.4%
- Interest rates2%
Sources
Every link opens the original source in a new tab. Values marked as estimates are informed estimates by the Capibud research team.
- en.wikipedia.orghttps://en.wikipedia.org/wiki/Semiconductor_industry_in_India
- en.wikipedia.orghttps://en.wikipedia.org/wiki/CHIPS_and_Science_Act
- en.wikipedia.orghttps://en.wikipedia.org/wiki/European_Chips_Act
- en.wikipedia.orghttps://en.wikipedia.org/wiki/TSMC_Arizona
- en.wikipedia.orghttps://en.wikipedia.org/wiki/Micron_Technology
- ism.gov.inhttps://ism.gov.in/
- nist.govhttps://www.nist.gov/chips
- digital-strategy.ec.europa.euhttps://digital-strategy.ec.europa.eu/en/policies/european-chips-act
- sec.govhttps://www.sec.gov/Archives/edgar/data/50863/000005086326000011/
- sec.govhttps://www.sec.gov/Archives/edgar/data/723125/000072312525000028/
- sec.govhttps://www.sec.gov/Archives/edgar/data/1045810/000104581026000021/
- iea.orghttps://www.iea.org/reports/energy-and-ai/executive-summary
- fred.stlouisfed.orghttps://fred.stlouisfed.org/series/PCU333242333242
Bring us one real decision in semiconductor manufacturing.
We start it from the Semiconductor manufacturing pack v1.0.0: 14 parameters, 10 swing factors and the 12-step project template, pinned to your decision.